TSMC Brings 3nm Chips to Japan, Kumamoto Goes Big

TSMC will make 3nm chips in Japan, first for the country, with Chairman and CEO C.C. Wei confirming the move during a Thursday meeting in Tokyo with Japan’s prime minister, Sanae Takaichi. She called the project “very meaningful” for economic security, with chips aimed at data centers, AI, robotics and autonomous driving. (nippon.com)

What 3nm means, in one line: smaller node sizes generally deliver denser, faster, more power‑efficient chips-the stuff AI servers crave. (cnbc.com)

Why TSMC switched to 3nm:

• The Kumamoto second fab was originally scoped for 6-12nm/7nm. Soft demand for those older nodes and other complications pushed delays and a rethink toward more advanced tech. (investing.com)
• Construction on the second plant slipped into the second half of 2025 and has faced local infrastructure snags; today’s news didn’t include a production start date. (digitimes.com)
• TSMC already makes 3nm in Taiwan; its second Arizona fab is slated to run 3nm in 2027, so Japan joins-not replaces-the advanced footprint. (thestar.com.my)

Money, because it matters:

• Yomiuri reports roughly $17B for the Kumamoto upgrade; TSMC hasn’t confirmed the figure. (investing.com)
• TSMC previously outlined more than $20B across its Japan venture; no changes to that overall plan were detailed today. (asahi.com)

Bigger picture, Japan is throwing real weight behind chips. Other government-backed efforts include Rapidus (a state-supported foundry startup in Hokkaido targeting 2nm mass production around 2027) and Micron Technology’s Hiroshima expansion for advanced HBM memory, both with hefty subsidies. (rapidus.inc)

So what: Japan finally gets local, cutting-edge logic at 3nm, which tightens supply chains and adds geopolitical insurance. It’s not instant gratification-ramping a 3nm fab is brutal on capex and yield-but if Japan sustains subsidies and TSMC executes, this meaningfully upgrades the country’s AI hardware base. (ft.com)